1. Field of the Invention
The present invention relates to an active-matrix display apparatus comprising a pair of insulating substrates attached to each other with a predetermined gap kept therebetween and an electro-optical material such as a liquid crystal filling the gap. More particularly, the present invention relates to the light-shielding structure of a signal line that is formed along with a thin-film transistor and its pixel electrode on the one insulating substrate.
2. Description of the Related Art
Referring to FIG. 7, the typical arrangement of an active-matrix display apparatus is briefly discussed. The display apparatus has a flat panel structure in which an electro-optical material such as a liquid crystal 50 is held between a lower insulating substrate 1 and an upper or top insulating substrate 60. A pixel array and drive circuit are integrated on the insulating substrate 1. The drive circuit is divided into a vertical scanning circuit 41 and a horizontal scanning circuit 42. Terminal electrodes 47 for external connections are formed on a top end portion of the insulating substrate 1. Each terminal electrode is connected to the vertical scanning circuit 41 and horizontal scanning circuit 42 via a wiring 48. Gate lines 43 and signal lines 10 intersecting each other are formed on the pixel array. The gate lines 43 are connected to the vertical scanning circuit 41 and the signal lines 10 are connected to the horizontal scanning circuit 42. A pixel electrode 14 and a thin-film transistor 3 for driving it are formed at each intersection where a gate line 43 intersects a signal line 10. Although they are not shown, an opposing electrode and a black mask are formed on the inner surface of the top insulating substrate 60. When a material having a relatively low heat resistance, such as glass, is used for the insulating substrate 1, the thin-film transistor 3 needs to be formed on the insulating substrate 1 through a low-temperature process at 60.degree. C. or lower. Although the thin-film transistor 3 is either of a top-gate type or a bottom-gate type, the bottom-gate type is more suited to the low-temperature process. The bottom-gate type thin-film transistor is constructed by laminating a gate electrode, a gate insulating film and then a semiconductor thin-film from bottom to top.
The pixel electrode 14 is arranged in an aperture surrounded by the signal lines 10 and the gate lines 43, and is connected to the corresponding thin-film transistor 3. To shade the area other than the aperture, a black mask (not shown) is formed on the top insulating substrate (opposing substrate) 60. The black mask is typically patterned in a grid (matrix) that matches the pattern in which the signal lines 10 and the gate lines 43 intersect each other. When the active-matrix display apparatus is assembled, the bottom insulating substrate 1 and the top insulating substrate 60 need to be glued to each other in a mutually aligned position. To offset the error in alignment, the black mask formed on the top insulating substrate 60 permits a margin of extra width of 3 .mu.m or more across the pattern against the dimension of the design requirement. This arrangement sacrifices the aperture ratio of the pixel electrode 14, lowering the brightness of the screen of the apparatus. There is room for improvement in the arrangement of the black mask. In the manufacturing of the bottom-gate type thin-film transistor through the low-temperature process, current technology fails to provide the structure (on-chip black) in which the black mask is formed on the bottom insulating substrate 1, and there is no choice but to form the black mask on the top insulating substrate (opposing substrate) 60. This arrangement imposes a substantial limitation on the design of pixel, for example, on the aperture ratio of pixel.